Chip upgrade helps miniature drones navigate

　　Researchers at MIT, who last year designed a tiny computer chip tailored to help honeybee-sized drones navigate, have now shrunk their chip design even further, in both size and power consumption.

　　The new computer chip, ‘Navion’, is 20m2 and consumes 24mW of power, yet according to MIT, is able to process camera images in real-time at up to 171 frames per second, as well as inertial measurements.

　　The researchers say the chip can be integrated into ‘nanodrones’ as small as a fingernail, to help the vehicles navigate, particularly in remote or inaccessible places where global positioning satellite data is unavailable.

　　The chip design can also be run on any small robot or device that needs to navigate over long stretches of time on a limited power supply.

　　The team envisions this chip in low-energy robotics and digestible medical devices.

　　"In traditional robotics, we take existing off-the-shelf computers and implement [state estimation] algorithms on them, because we don't usually have to worry about power consumption," Associate Professor Sertac Karamansays. "But in every project that requires us to miniaturise low-power applications, we have to now think about the challenges of programming in a very different way."

　　In previous work, the team began to address such issues by combining algorithms and hardware in a single chip. Their initial design was implemented on an FPGA, and was able to perform state estimation using 2W of power. But, the power consumption was still greater than the total amount of power that miniature drones can typically carry, which researchers estimate to be about 100Mw.

　　To shrink the chip further in size and power, the team built a chip from the ground up, rather than reconfiguring an existing design.

　　The new chip is designed to minimise the amount of data – in the form of camera images and inertial measurements – that is stored on the chip at any given time. The design is also said to optimise the way this data flows across the chip.

　　"Any of the images we would have temporarily stored on the chip, we actually compressed so it required less memory," says Associate Professor Vivienne Sze of MIT. The team also cut down on extraneous operations, such as the computation of zeros, which results in a zero. The researchers found a way to skip those computational steps involving any zeros in the data. "This allowed us to avoid having to process and store all those zeros, so we can cut out a lot of unnecessary storage and compute cycles, which reduces the chip size and power, and increases the processing speed of the chip," Sze adds.

　　Through their design, the team was able to reduce the chip's memory from its previous 2megabytes, to about 0.8megabytes.

　　"While we customised the chip for low power and high speed processing, we also made it sufficiently flexible so that it can adapt to these different environments for additional energy savings," Sze says. "The key is finding the balance between flexibility and efficiency." The chip can also be reconfigured to support different cameras and inertial measurement unit sensors.