In a recent guest editorial here on EE Times, legendary professor David Patterson wrote about busting the five myths around the RISC-V instruction set architecture (ISA). At the recent RISC-V Summit organized by RISC-V International, the consortium that manages and promotes the RISC-V Instruction Set Architecture (ISA), its president, Calista Redmond, had a far more blunt message: RISC-V is inevitable.
In fact, she said, RISC-V will eventually have the best CPUs, the best software running on them and the best ecosystem of any microprocessor core family. These are mighty strong words for a nascent ISA that is only about 10 years old and that competes with the far more established Arm and x86 ISAs. It almost sounded like the Borg from Star Trek when they say, “Resistance is futile.”
RISC-V International CEO Calista Redmond (Source: RISC-V International)
Redmond’s reason for saying that RISC-V is inevitable is that its growth and success are built upon shared investments of many companies, universities and contributors. RISC-V International has more than 3180 members. Billions of dollars have been invested in the architecture, including national programs from countries and regions such as India and the E.U. This enables the development of the “best” processor in multiple price and performance categories with the contributions of so many ideas and collective knowledge. Because RISC-V is scalable, customizable and modular, it can easily be optimized for different workloads and applications.
The software ecosystem is growing, and efforts are underway to make software development more efficient with profiles and standards like a single hypervisor standard.
RISC-V origins
RISC-V is an open specification like Ethernet. It was developed at University of California, Berkeley (UC Berkeley) with a clean-slate approach to RISC (reduced instruction set computer) designs. There had been many RISC ISAs in the past: 29K, Alpha, Arm, i960, MIPS, PowerPC and SPARC to name some. All those other RISC architectures have been tied to a corporate owner, and most have become outdated.
The researchers at UC Berkley felt it was time for a clean slate with no corporate owners, initially for educational use, but they soon recognized it was useful for more than instructional purposes.
With this approach, multiple companies can build CPUs using the open standard. This means that there are many different options to get RISC-V CPUs, and there are more every year. You can download the specifications and design your own CPU. You can download open-source versions of RISC-V CPUs. You can buy a CPU core from multiple IP vendors. You can get a customized CPU core from other vendors. You can buy chiplets with RISC-V cores. You can buy a chip with an RISC-V processor. Or you can buy a full AI chip running with RISC-V cores.
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