DARPA Heeds Moore’s Wisdom

　　Gordon Moore, whose eponymous law has guided the industry for decades, supplied the ideas behind the Defense Advanced Research Projects Agency’s newly announced additions to its Electronics Resurgence Initiative (ERI), according to Bill Chappell, director of DARPA’s Microsystems Technology Office (MTO). DARPA this week posted three broad agency announcements (BAAs) that describe six new programs to address the problems that Moore 50 years ago predicted would loom at the end of the current silicon roadmap. The programs will collectively add $75 million a year to the ERI’s cost, bring the projected annual tally for the four-year initiative to $216 million. The agency is calling the new programs its Page 3 Investments as a tribute to Moore, who described the research challenges on page 3 of “Cramming More Components onto Integrated Circuits,” published in Electronics in April 1965 and excerpted here.

　　Heat Problem

　　Will it be possible to remove the heat generated by tens of thousands of components in a single silicon chip?

　　If we could shrink the volume of a standard high-speed digital computer to that required for the components themselves, we would expect it to glow brightly with present power dissipation. But it won’t happen with integrated circuits. Since integrated electronic structures are two dimensional, they have a surface available for cooling close to each center of heat generation. In addition, power is needed primarily to drive the various lines and capacitances associated with the system. As long as a function is confined to a small area on a wafer, the amount of capacitance which must be driven is distinctly limited. In fact, shrinking dimensions on an integrated structure makes it possible to operate the structure at higher speed for the same power per unit area.

　　Day of Reckoning

　　Clearly, we will be able to build such component-crammed equipment. Next, we ask under what circumstances we should do it. The total cost of making a particular system function must be minimized. To do so, we could amortize the engineering over several identical items, or evolve flexible techniques for the engineering of large functions so that no disproportionate expense need be borne by a particular array. Perhaps newly devised design automation procedures could translate from logic diagram to technological realization without any special engineering. It may prove to be more economical to build large systems out of smaller functions which are separately packaged and interconnected. The availability of large functions, combined with functional design and construction, should allow the manufacturer of large systems to design and construct a considerable variety of equipment both rapidly and economically.

　　Linear Circuitry

　　Integration will not change linear systems as radically as digital systems. Still, a considerable degree of integration will be achieved with linear circuits. The lack of large- value capacitors and inductors is the greatest fundamental limitation to integrated electronics in the linear area.

　　By their very nature, such elements require the storage of energy in a volume. For high Q it is necessary that the volume be large. The incompatibility of large volume and integrated electronics is obvious from the terms themselves. Certain resonance phenomena, such as those in piezoelectric crystals, can be expected to have some applications for tuning functions, but inductors and capacitors will be with us for some time.

　　The integrated RF amplifier of the future might well consist of integrated stages of gain, giving high performance at minimum cost, interspersed with relatively large tuning elements.

　　Other linear functions will be changed considerably. The matching and tracking of similar components in integrated structures will allow the design of differential amplifiers of greatly improved performance. The use of thermal feedback effects to stabilize integrated structures to a small fraction of a degree will allow the construction of oscillators with crystal stability.

　　Even in the microwave area, structures included in the definition of integrated electronics will become increasingly important. The ability to make and assemble components small compared with the wavelengths involved will allow the use of lumped parameter design, at least at the lower frequencies. It is difficult to predict at the present time just how extensive the invasion of the microwave area by integrated electronics will be. The successful realization of such items as phased-array antennas, for example, using a multiplicity of integrated microwave power sources, could completely revolutionize radar.

　　According to Chappell, the ERI program will “stand on the shoulders of Moore” by extending his principles to ensure continuance of “the greatest commercial benefits and the greatest gains in defense capabilities” ever achieved.

　　Chappell believes that Moore’s Law can be extended indefinitely by DARPA’s ERI initiatives, which already address materials and integration, circuit design, systems architecture, and strengthening of the fundamental-research base.

　　The agency’s new Three Dimensional Monolithic System-on-a-Chip (3DSoC) program will aim at a fiftyfold improvement in computation time, while using less power, by packing processors, logic, memory, and input/output in power-saving, high-riser three-dimensional cubes. A second program, funded under the same BAA as the 3DSoC initiative, is Foundations Required for Novel Computers (FRANC), which will scrap John von Neumann’s separate data and memory functions. According to DARPA, combining data and memory functions will “overcome the memory bottleneck” of moving data from memory to the processor and back again. The effort will require development of novel materials, such as memristors; components, such as artificial neurons and synapses; and algorithms, including ones modeled on the human brain.

　　The second new BAA is a two-pronged effort to redefine circuit and system specialization. The Intelligent Design of Electronic Assets (IDEA) program will look to automate design so that even nonengineers can describe the functions to be performed, with a robotic design automation system doing the work to create the design overnight. The Posh Open Source Hardware (POSH) program will support a complementary open-source verification framework to check and redesign, if necessary, even the most complicated systems-on-chip and printed-circuit boards produced by IDEA.

　　The third BAA likewise comprises two programs. Software Defined Hardware (SDH) will act as a “decision assistant” for reconfigurable hardware/software that will run data-intensive algorithms for artificial-intelligence applications using application-specific ICs to handle the thousands of intelligence, surveillance, and reconnaissance sensors used in modern warfare as well as civilian Big Data applications. The complementary Domain-Specific System-on-a-Chip (DDSoC) program aims to develop multi-application hardware/software systems that users could mix and match to solve problems such as software-defined radio, which encompasses mobile communications, satellite communications, personal area networks, and all types of radar. SDR applications will emerge for electronic warfare between 2025 and 2030, according to Chappell.

　　For more details, see DARPA’s slide deck on the six new directions for the ERI program.